00001
00002 #ifdef DEBUG
00003 #define putcomment1(a,b) {fprintf(Voutfile,a,(b)); fprintf(Voutfile,"\n");}
00004 #else
00005 #define putcomment1(a,b) fprintf(Voutfile,"\n")
00006 #endif
00007
00008 #ifdef DEBUG
00009 #define putcomment2(a,b,c) {fprintf(Voutfile,a,(b),(c)); fprintf(Voutfile,"\n");}
00010 #else
00011 #define putcomment2(a,b,c) fprintf(Voutfile,"\n")
00012 #endif
00013
00014 #ifdef DEBUG
00015 #define putcomment(a) {fprintf(Voutfile,"\t%s\n",a);}
00016 #else
00017 #define putcomment(a) fprintf(Voutfile,"\n")
00018 #endif
00019
00020
00021
00022
00023 #define ObjSize 4
00024
00025
00026
00027
00028 #define AR_FIRST_PARM 1
00029
00030
00031
00032
00033 #define FO_SIZE 0
00034 #define FO_EP FO_SIZE+ObjSize
00035 #define FO_IP FO_EP+ObjSize
00036 #define FO_OBJ_SIZE 3
00037
00038 #ifdef DEBUG
00039 #define ASSERT(a,b) { if (!(a)) {dbgmsg(b);abort();} ;}
00040 #else
00041 #define ASSERT(a,b)
00042 #endif
00043
00044 #ifdef DEBUG
00045 #define ASSERT2(a,b,c) {if (!(a)) {dbgmsg(b,c);abort();};}
00046 #else
00047 #define ASSERT2(a,b,c)
00048 #endif
00049
00050
00051 #define R0 0x0001
00052 #define R1 0x0002
00053 #define R2 0x0004
00054 #define R3 0x0008
00055 #define R4 0x0010
00056 #define R5 0x0020
00057 #define R6 0x0040
00058 #define R7 0x0080
00059 #define R8 0x0100
00060 #define R9 0x0200
00061 #define R10 0x0400
00062 #define R11 0x0800
00063 #define Rap 0x1000
00064 #define Rfp 0x2000
00065 #define Rsp 0x4000
00066 #define Rpc 0x8000
00067
00068
00069 #define movc_regs (R2|R3|R4|R5)
00070
00071
00072 #define POP(reg,com) {\
00073 fprintf (Voutfile,"\tmovl\t(sp)+,%s",reg);\
00074 putcomment (com);}
00075
00076 #define POP_DISP(reg,disp,com) {\
00077 fprintf (Voutfile,"\tmovl\t(sp)+,%d(%s)",(disp)*ObjSize,reg);\
00078 putcomment (com);}
00079
00080 #define PUSH(reg,com) {\
00081 fprintf (Voutfile,"\tpushl\t%s",reg);\
00082 putcomment (com);}
00083
00084 #define PUSH_DISP(reg,disp,com) {\
00085 fprintf (Voutfile,"\tpushl\t%d(%s)",(disp)*ObjSize,reg);\
00086 putcomment (com);}
00087
00088
00089
00090
00091
00092
00093
00094 #define L0fp "r9"
00095 #define L0FP R9
00096
00097
00098
00099
00100
00101
00102
00103
00104
00105
00106
00107 #define DISPLAY(dest,level,rdest,com) {\
00108 if (level == 0) { \
00109 dest = L0fp; \
00110 } else if (level == Vlevel) { \
00111 dest = "ap"; \
00112 } else { \
00113 int i = Vlevel - level; \
00114 char * source = "ap"; \
00115 \
00116 while (i >= 2) { \
00117 fprintf(Voutfile,"\tmovl\t*(%s),%s", source, rdest); \
00118 i =- 2; source = rdest; \
00119 if (i > 0) fprintf(Voutfile, "\n"); \
00120 } \
00121 if (i == 1) { \
00122 fprintf(Voutfile,"\tmovl\t(%s),%s", source, rdest); \
00123 } \
00124 dest = rdest; \
00125 } \
00126 putcomment (com);}
00127
00128 #define CODE(line) { fputs(line, Voutfile); putc('\n', Voutfile); }
00129
00130
00131 #define NEWOBJ { \
00132 CODE("\tmoval\t_objfreelist[r1],r10");\
00133 CODE("\tmovl\t(r10),r0");\
00134 CODE("\tjneq\t1f");\
00135 SET_GC_INFO;\
00136 CODE("\tpushl\tr1");\
00137 CODE("\tcalls\t$1,_allocobj");\
00138 CODE("1:\tmovl\t(r0),(r10)");\
00139 Ventry_mask |= R10;}
00140
00141 #define FXD_NEWOBJ(s) {\
00142 fprintf(Voutfile,"\tmoval\t_objfreelist+%d,r10\n", 4*(s));\
00143 CODE("\tmovl\t(r10),r0");\
00144 CODE("\tjneq\t1f");\
00145 SET_GC_INFO;\
00146 fprintf(Voutfile, "\tpushl\t$%d\n", (s));\
00147 CODE("\tcalls\t$1,_allocobj");\
00148 CODE("1:\tmovl\t(r0),(r10)");\
00149 Ventry_mask |= R10;}
00150
00151 #define SET_GC_INFO {\
00152 fprintf(Voutfile,"\tmovl\t$0x%x,r11\n",(Vgc_mask<<16));\
00153 Ventry_mask |= R11;}
00154
00155 #define ASM_HEADER {\
00156 CODE("\t.globl _russell_entry" );\
00157 CODE("\t.globl _objfreelist" );\
00158 CODE("\t.globl _allocobj" );\
00159 CODE("\t.globl _entry_ar_sz" );\
00160 CODE("\t.text" );\
00161 CODE("\t.align 1" );\
00162 CODE("_russell_entry:" );\
00163 CODE("\t.word 0" );\
00164 CODE("\tcallg *4(ap),russell_top_level" );\
00165 CODE("\tret" );}
00166
00167 void Vretreg();
00168
00169 char * Vnewreg();
00170
00171 char * Vnewlabel();
00172
00173 extern int Ventry_mask;
00174 extern int Vgc_mask;
00175
00176 extern int Vreg_bit;